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Drawing PCB

Once the schematic is finished, select "File", "Switch to board" to open the PCB. A new window is then opened showing the PCB editor and including all parts and airwires (unrouted wires) between the components corresponding to the schematic as shown below.

Configure for mils

Eagle is by default configured for inches. We want to work in "mils" (milli-inches), so click "View", "Grid" and select "mils" in both dropdown menus. Select "ok".

Note that the grid should always be as large as possible to prevent messy routing. The default values are normally just fine.

Board shape

The first thing to do is define the board size. The black lines (see the figure above) indicate the outline of the PCB, and these need to be moved to the desired locations. Note that component placement for the freeware version is limited to 100x80mm, so do not go beyond these dimensions if you use the freeware version.

To dimension your board, determine its desired size in mils. Google can do that: just search for "70mm in mil" to convert 80mm into mils. For example, if the board must be 70x38mm, this equals approx. 2750x1500mils.

Select the "move" tool and use [CTRL]+left click the top-right corner of the PCB outline. Using CTRL while clicking mounts the mouse precisely to the thing you're selecting. Now, using the keyboard, just type "(2750 1500) [enter]". This places this corner at precisely the right location. Do this for all corners using the appropriate values, and the outline is set.

Basic component placement

Now we have established a PCB drawing area, we can start to place the components. Use the "move" tool in combination with the right mouse button ("rotate") to place all components within the board dimensions.

Place components wisely. Think about how they are connected (the yellow airwires give a nice indication of the required routing) and how power and signal are separated.

Hint: ANY operation in Eagle is cancelled by pressing [ESC] on the keyboard.

Placement hints: PCB traces for power should be kept as short as possible. Signal (e.g. OP-AMPs/micro controllers) should be kept as far away from power (e.g. power supplies, MOSFETs, relays) as possible. Never make large loops, they function as interference transmitter (power) or receiver (signal). Do not route signal lines directly above eachother (top and bottom), this causes cross-coupling. Use ground planes to prevent cross-coupling and for shielding. Place enough ceramic decoupling capacitors as close as possible to all semiconductor power supply nets (100 nF for signal, up to > 1 uF for power) to prevent voltage dips/ringing caused by the trace inductance.

Drawing (ground)planes

Next up are the planes. You probably want a groundplane below the analog part of your circuit to prevent EMI and cross-coupling. Planes also simplify routing as parts of the supply are routed automatically. For a two-layer design (top and bottom routing), both layers typically have a ground plane.

To draw a plane, use the "polygon"  tool. Then choose to draw on the top or the bottom of the PCB by selecting layer 16 (bottom/blue) or 1 (top/red) from the dropdown menu on the top of the window. Now, enter the first corner of the polygon by typing the first point of the outline of the PCB, e.g. "(0 0) [enter]". Then the next, "(2750 0) [enter]", "(2750 1500) [enter]", "(0 1500) [enter]", "(0 0) [enter]". The polygon is now finished and should become a dotted line. This indicates a closed shape.

Now, connect the polygon to a net by clicking the "name"  tool and clicking the outline of the polygon. Then enter the desired net name. For instance, enter "GND" to create a groundplane.

Verify the polygon is correct by clicking the "ratsnest" tool to redraw the PCB. The polygon should become filled and all supply pins of the components (e.g. ground pins for a groundplane) must become connected to the plane automatically.

The result after PCB dimensioning, placement and adding a bottom ground plane is shown in the figure below.

Routing

Now everything is in place, we can start to route the traces using the "route" tool.

Configuring the routing tool

Select the tool, then configure how to route in the top of the window. Configure the following:

  • Which plane to use (top or bottom)
  • How bends are made (always use 45 degree bends, e.g. the second and fourth option)
  • The width of your trace (basic signals: use 10 mils, power: calculate the width)
  • What type of via to use (normally round vias are used)

Vias are used to switch planes (route a signal to the bottom or top plane). In order to switch plane, during routing select another plane. The trace will continue on the selected plane and a via is created automatically.

For trace width calculations: PCB copper thickness is normally 35 um and the allowed temperature rise can normally be set to 20 degrees C. Trace length does not influence the width.

Selecting the trace to route

When routing, the first click selects the net (or airwire) you want to route. If this is the wrong airwire, right-click to select the next net in the area.

Alternative grid

If you pres [ALT] while routing a wire, the alternative (fine) grid is used. This can be handy to route through narrow spaces, for instance.

Ripup

If you've made a mistake during routing, you can use the "ripup" tool to delete a trace.

Ratsnest

Regularly click the "ratsnest"  tool to redraw the PCB.

Improving visibility

To improve visibility, it is possible to change the background color to black, using "Options", "User interface" and select "black" for background color. Try it and see what you prefer.

Furthermore, layers can be enabled or disabled to improve visibility. The default layer visibility is shown in the figure below. To further increase visibility, you can temporarily ripup planes (polygons) by clicking on the outline of the polygon using the ripup tool.

Finished?

Routing is finished when ratsnest shows  in the bottom status bar.

Hint: if you're almost finished but can't find the remaining airwires, disable all layers except the "Unrouted" layer. Now you can easily spot them.

The routed example looks like this:

Some remarks

Drawing this PCB took me less than 10 minutes. As can be seen, it uses only one layer, due to smart inital placement of the components. Routing and placement is a puzzle game: basic placement is determined on beforehand, but minor changes can be made to the placement during the routing process to simplify the puzzle.

Hint: never use autoroute. Autoroute cannot think the way we do: it does not optimize for EMI or power/signal isolation. It provides non-optimal solutions (if any at all).

Finishing up

All component names and values should be placed in a readable location on the silkscreen (written text on your PCB). This is done using the "smash" and "move" tool.

You can add your name/project name/whatever using the "text" tool on the "tNames" layer (25). The final PCB is shown below.

Quiz

To test whether this PCB is correctly designed, we verify various things:

  • Are all airwires connected?
  • Are all supply nets properly decoupled using ceramic capacitors at the correct locations?
  • No long parallel analog signal traces without a groundplane next/below to it?
  • Are connectors placed correctly and pinned correctly? (e.g. pin 1 at the right place)
  • Are power traces as short as possible?
  • Are power and signal traces seperated properly?
  • Is the ground plane wide enough at all places to carry the return current?
  • Does the PCB pass the DRC (design rule check)? (if applicable)
  • Are mounting holes placed correctly? (if required)

Does the PCB shown above comply to our quiz?

No! Because:

There is no decoupling capacitor for the microcontroller (at least, not close to the device). Also, if we would have switched locations of the diode D1 and resistor R1, the trace length of the connecting wires would become much shorter. Moreover, there is room enough to allow a groundplane inbetween the traces on the right of the PCB to reduce crosstalk, which is not used in this design. And last (but not least) the ground plane between the oscillator capacitors C5 and C6 has a large loop. DRC is not used in this design.